The majority of present day integrated circuits (ICs) are implemented by using a plurality of interconnected field effect transistors (FETs), also called metal oxide semiconductor field effect transistors (MOSFETs or MOS transistors). The ICs are usually formed using both P-channel and N-channel FETs and the IC is then referred to as a complementary MOS or CMOS integrated circuit (IC). There is a continuing trend to incorporate more and more circuitry on a single IC chip. To incorporate the increasing amount of circuitry, the size of each individual device in the circuit and the size and spacing between device elements (the feature size) must decrease.
High dielectric constant materials, also referred to as “high-k dielectrics,” are considered for the 45 nm node technology and beyond to allow further scaling of gate dielectrics. High-k dielectrics are those materials having a dielectric constant greater than silicon dioxide (SiO2) and include, for example, hafnium dioxide (HfO2), hafnium silicate oxide (HfSiO), hafnium silicate oxide nitride (HfSiON), and zirconium dioxide (ZrO2). To prevent Fermi-level pinning, metal gates (MG) with the proper work function are used as gate electrodes on the high-k gate dielectrics. Such metal gate electrodes typically are formed of metal-comprising materials such as aluminum (Al), magnesium (Mg), titanium-based materials such as titanium nitride (TiN), tantalum-based materials such as tantalum nitride (TaN) or tantalum carbide (Ta2C), and the like. Lanthanum (La) is becoming a particularly popular metal for use in metal gates. Often, a thin oxide forms on the metal-comprising material when exposed to an ambient environment. The oxide may serve to protect the metal-comprising material from contamination.
A dual-gate CMOS device may be fabricated so that the N-channel MOS transistor (NMOS) and the P-channel MOS transistor (PMOS) are formed with different gates that have different work functions, thus making each transistor more efficient. Using the dual-gate fabrication process, a gate oxide is deposited overlying a semiconductor substrate, followed by the deposition of a first metal-comprising material, such as lanthanum, that will be used to form the NMOS. A photoresist is formed overlying the first metal-comprising material and is patterned to form an etch mask. The first metal-comprising material then is etched to form an NMOS gate stack. The photoresist is removed from the NMOS and a second gate-forming material is globally deposited and then is etched to form the gate electrode of the PMOS.
Typically, a hydrochloric acid (HCl)-based chemistry, which has a pH in the range of about less than zero to about less than one, depending on concentration, is used to remove the first metal-comprising material from the PMOS because it can do so quickly. However, HCl is a very strong acid with a chlorine atom. As a strong acid, HCl dissociation goes to completion in an aqueous medium, that is, HCl dissociates according to the equation:HCl(aq.)→H++Cl−,thus providing free chlorine ions. Chlorine has the highest electron affinity of the elements of the periodic chart, has a relatively high electronegativity of 3, and is a very strong oxidizing agent. Fluorine has a higher electronegativity of 4 but hydrogen fluoride (HF) does not dissociate as readily as HCl does, and therefore is a weaker acid than HCl. Accordingly, because of its reactive nature and its complete dissociation in water, HCl is a difficult etchant to control. If the concentration of the HCl chemistry is too high or the time the device is exposed to the chemistry is too long, during removal of the first metal-comprising material from the PMOS region, the HCl chemistry can undercut the first metal-comprising material of the NMOS that underlies the photoresist, which results in device degradation. Of course, if the concentration of the HCl chemistry is too low, or if the exposure time is not sufficiently long, residue of the first metal-comprising material remains on the PFET oxide, thus resulting in device defects.
Accordingly, it is desirable to provide methods for removing a metal-comprising material from a semiconductor material using an aqueous non-chlorine-comprising acid solution having a pH of less than about 7. Furthermore, other desirable features and characteristics of the present invention will become apparent from the subsequent detailed description of the invention and the appended claims, taken in conjunction with the accompanying drawings and this background of the invention.